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专题讨论:通过异构集成和开放式创新推进可扩展计算.pdf

上传人: 明**** 编号:1011467 2025-12-21 14页 1.06MB

1、PanelPanel:Photonics&Photonics&ChipletsChiplets-Advancing Scalable Computing through Advancing Scalable Computing through Heterogeneous Integration and Open InnovationHeterogeneous Integration and Open InnovationCHIPLETS AND ADVANCED PACKAGING/PHOTONICSRobert Lo,ITRI(Moderator)Erik Chen,ArtiluxCT Ka

2、o,CadenceDebendra Das Sharma,IntelJawad Nasrullah,Palo Alto ElectronPanel:Photonics&Chiplets Panel-Advancing Scalable Computing through Heterogeneous Integration and Open InnovationModerator:Robert LoDeputy General Director/ITRICHIPLETS AND ADVANCED PACKAGING/PHOTONICS Modular Chiplet Architectures

3、and Heterogeneous Integration Overcoming 2.5D/3D Manufacturing Complexities Photonics and Chiplets Co-Evolution Standards and Toolchains Chiplet Testing Strategies and Tradeoffs Collaboration and Open InnovationKey Points:Key Points:Time SlotsTime SlotsAgendaTimeOpeningModerator-2 minsKey Issues to

4、Explore I(1 moderator+4 panelists)x 2 mins=10 minsKey Issues to Explore II(1 moderator+4 panelists)x 2 mins=10 minsKey Issues to Explore III(1 moderator+4 panelists)x 2 mins=10 minsKey Issues to Explore IV(1 moderator+4 panelists)x 2 mins=10 minsKey Issues to Explore V(1 moderator+4 panelists)x 2 mi

5、ns=10 minsKey Issues to Explore VI(1 moderator+4 panelists)x 2 mins=10 minsClosing(1 moderator+4 panelists)x 1 mins=5 minsAugust 6,2025 11:00 am-12:00 pm(60 mins)CHIPLETS AND ADVANCED CHIPLETS AND ADVANCED PACKAGING/PHOTONICSPACKAGING/PHOTONICSPanel:Photonics&Chiplets:Advancing Scalable Computing th

6、rough Heterogeneous Integration and Open InnovationDr.Dr.DebendraDebendra Das Sharma Das Sharma Senior FellowSenior FellowIntel Intel Dr.Erik ChenDr.Erik ChenCoCo-Founder and CEOFounder and CEOArtiluxArtiluxDr.CT KaoDr.CT KaoPE Group DirectorPE Group DirectorCadenceCadenceDr.Jawad NasrullahDr.Jawad

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根据《Photonics & Chiplets -Advancing Scalable Computing through Heterogeneous Integration and Open Innovation》会议内容,以下为全文关键点: 1. **模块化芯片架构与异构集成**:采用模块化芯片设计,标准化互连(如AIB、BoW、UCIe)以实现可扩展集成。 2. **2.5D/3D制造复杂性**:解决2.5D/3D集成中的挑战,如精确晶圆放置、翘曲控制、细间距互连等。 3. **光子学与芯片协同进化**:光子技术与芯片集成,如Co-Packaged Optics (CPO)、光学I/O等。 4. **标准和工具链**:标准化如BoW 2.1、UCIe 2.0、CDXML等,以及开发协同设计工具。 5. **芯片测试策略**:采用BIST、KGD、IEEE 1838等测试策略,平衡覆盖范围、成本和可靠性。 6. **开放创新**:通过开源设计流程、共享IP平台、学术产业联盟等推动开放芯片经济。
"芯片模块化设计挑战" "光子学与芯片协同进化" "开放芯片经济前景如何?"
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