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1、Revisit MBFF:Efficient Early-Stage Multi-bit Flip-Flops Clustering with Physical and Timing AwarenessASP-DAC 2025Yichen Cai,Linyu Zhu,and Xinfei GuoShanghai Jiao Tong UniversityJanuary 23,2025Outline2BackgroundWhat is Multi-Bit Flip-Flop(MBFF)?Stage-related Clustering ResultOur ApproachStep 1.Flip-F
2、lop Distance EstimationStep 2.Signal Path Timing EstimationStep 3.MBFF Clustering AlgorithmExperiment Setup and ResultsConclusionsWhat is Multi-Bit Flip-Flop(MBFF)?By clustering FFs togetherShare a common clock pinSave internal invertersAdvances by clusteringSimplify clock tree structureReduce power
3、3Stage-related Clustering ResultLogic-basedclusteringPhysics-basedclusteringafter synthesisafter placementRed:1bit FFYellow:MBFFDesign:or12004Stage-related Clustering Resultafter synthesisafter placementRed:1bit FFYellow:MBFFDesign:or12005Stage-related Clustering Resultafter synthesisafter placement
4、Red:1bit FFYellow:MBFFDesign:or12006Stage-related Clustering Resultafter synthesisafter placementRed:1bit FFYellow:MBFFDesign:or12007Stage-related Clustering Resultafter synthesisafter placementRed:1bit FFYellow:MBFFDesign:or12008Flexibility(power)QoR(timing)Trade-off!Our Approach9Early-stage physic
5、al awarenessEarly-stage timing awarenessMBFF clustering algorithmStep 1.Flip-Flop Distance Estimation10Consider physical localityFF with shorter distance will result in better timingRun placement in floorplan mode87 times speedup compared to normal placementCalculate Manhattan distanceApply threshol
6、d distance to filter FF combinationsStep 2.Signal Path Timing Estimation11Based on NLP-based timing prediction modelEmbedded with basic gate features and global featuresTrained as regression model using golden delays without MBFF clusteringEstimate both input and output delayStep