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1、Via Fabrication with Multi-Row Guiding Templates Using Lamellar DSAThe Electronic Design Automation LaboratoryDepartment of Electrical Engineering National Taiwan University of Science and TechnologyTaipei 106,Taiwan1Presenter:Yun-Na TsaiAdvisor:Shao-Yun FangJanuary 23,2025OutlineIntroductionOur App
2、roachesExperimental ResultsConclusion2Lamellar DSALamellar Directed Self-Assembly(Lamellar DSA)An advanced process for via layer fabrication3M1 routing wireM2 routing wireViaGuiding templateBCPSingle-row templateDouble-row templateSingle-row templateDouble-row templateIntroductionDesign ConstraintsL
3、imited template shapesSingle-row templates:1 x nDouble-row templates:2 x nShort template1 x 1 single-row template2 x 3 double-row template4Mask conflictLayout decomposabilityBCP violationCircuit functionalityOutline5IntroductionOur ApproachesExperimental ResultsConclusionThe proposed ILP flow6Input
4、layoutTemplate enumerationTemplate conflict graph constructionILP-based methodVia guiding template resultTemplate EnumerationGiven a via layout,construct a grid-based data structure(map)Vias locationWire distribution(lower metal layer&upper metal layer)Stop point:a grid point generating a BCP violat
5、ion if it overlaps with a templateSingle-row template1 1(short template)1 31 nDouble-row template2 3(short template)2 42 n7The Proposed ILP Flow8Input layoutTemplate enumerationTemplate conflict graph constructionILP-based methodVia guiding template resultTemplate Conflict Graph ConstructionMask con
6、flict area of each templateSame-mask conflict areaDifferent-mask conflict area9T1T1T1T1T1T1T1T1T1T1T1T1T1T1T1M1 routing wireM2 routing wireViaGuiding templateDifferent mask conflictSame mask conflictT1T3T2T1T1T1T1T1T1T1T1T1T1T1T1T1T1T1T1Stop pointT1Template Conflict Graph Construction10T1T2T3Same ma