Caliptra 最新进展：路线图、集成和保障.pdf

1、Andrs Lagar-Cavilla,Distinguished Engineer,GoogleBryan Kelly,Partner Architect,MicrosoftPrabhu Jayanna,Sr.Director,AMDPaul Chou,Sr.Director,NVIDIACaliptra Update:The Second GenerationCaliptra Update:The Second GenerationAndrs Lagar-Cavilla,Distinguished Engineer,GoogleBryan Kelly,Partner Architect,M

2、icrosoftPrabhu Jayanna,Sr.Director,AMDPaul Chou,Sr.Director,NVIDIASECURITYPanel DiscussionAndrs Lagar-CavillaGoogleBryan KellyMicrosoftPrabhu JayannaAMDPaul ChouNVIDIAPictures TBDCaliptra Roadmap 2025/2026+NIST PQC Recommendations(CNSA 2.0 Compliant+ML-DSA:Dilithium+Caliptra Subsystem+OCP Recovery/I

3、3C Streaming Boot+MCU for SoC boot+Fuse Controller(extensible for SoC Use)+NIST PQC Recommendations(CNSA 2.0 Compliant)+ML-KEM:Kyber+OCP L.O.C.K+Area reduction+Trademark Conformance2.02.12.2Q4 252026Now+USB 2.0 IP for MCTP flashless boot and Recovery+More VeeR(RISC-V)Security Countermeasures/feature

4、s+Area reduction+Brainstorming UCIe CTA supportV1.1 released Sept 2024The General Availability(GA)dates for the first Cloud SoCs carrying Caliptra integrations are less than 15 months away.What We Are Most Excited AboutOpen source PQCAchieve CNSA compliance and ensure long term runwayCore and Subsys

5、tem capabilitiesCore:Traditional Caliptra crypto and DICE engine for SoCsSubsystem:Full boot solution for SoCsFor a growing segment(SSD,BMC,CPU,GPU,Accelerators)OCP L.O.C.K.on track for SSD integrationsAddressing hyperscaler threat model with consistent implementationTrademark licensing framework li

6、veEnsure integrations meet a bar and protect the communitys investmentWhat We Are Excited AboutAdditional RISC-V countermeasuresFaster boot,smaller code size,higher assuranceUSB 2.0Faster MCTP solution for flashless bootArea reductionExpand