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1、Session 28 Overview:Capacitive Sensor Readout ANALOG SUBCOMMITTEETi me-domai n si gnal processi ng,two-step conversi on,and conti nuous-ti me si gnal chai ns enable i mprovements i n the perf ormance of capaci tance-to-di gi tal converters f or a di verse range of appli cati ons.The techni ques reve
2、aled i n thi s sessi on i nclude the combi nati on of ti me-domai n si gnal processi ng and two-step conversi on to i mprove i nput range and conversi on ti me(Paper 28.1),the use of conti nuous-ti me hi gh-pass noi se-shapi ng to mi ti gate thermal noi se ali asi ng and fli cker noi se(Paper 28.2),
3、the use of a novel phase-domai n add-then-subtract lead-compensati on scheme to stabi li ze a controlled-osci llator-based backend 2nd-order delta-si gma modulator(Paper 28.3),and the use of phase-domai n si gnal processi ng to enhance i mmuni ty to EMI (Paper 28.4).480 2025 I EEE I nternati onal So
4、li d-State Ci rcui ts Conf erenceISSCC 2025/SESSION 28/CAPACITIVE SENSOR READOUT/OVERVIEW979-8-3315-4101-9/25/$31.00 2025 I EEESession Chair:Caspar van Vroonhoven Analog Devi ces,Muni ch,Germany Session Co-Chair:Chi nwuba Ezekwe Robert Bosch,Sunnyvale,CA 10:55 AM 28.3 A 185.2dB-FoMs 8.7aFrms Zoomed
5、Capacitance-to-Digital Converter with Chopping-Based kT/C Noise Cancellation and Add-Then-Subtract Phase-Domain Lead-Compensation Technique Bi ngrui Li,Peki ng Uni versi ty,Bei j i ng,Chi na I n Paper 28.3,Peki ng Uni versi ty presents an i ncremental zoom capaci tance-to-di gi tal converter.The con
6、verter combi nes a SAR f ront-end wi th a 2nd-order delta-si gma modulator backend,whi ch employs a Gm-C-based 1st stage and a controlled-osci llator-based 2nd stage,stabi li zed by an add-then-subtract lead-compensati on scheme,to achi eve an 18.2f J/conversi on step FoMW at 1.2pF f ull-scale range