欧洲 HPC 芯片计划（第 1 部分）.pdf

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1、Moderator:Alexandra KourfaliProgramme Manager R&IEuropean Chip Initiatives for HPCGorilla Room 4Our ambition:by 2030The production of cutting-edge and sustainable semiconductors in Europe including processors is at least 20%of world production in value Manufacturing capacities below 5nm nodes aiming

2、 at 2nmEnergy efficiency 10X more than todayStrategic EU-level perspective on Chips for HPCEU goal:autonomy in strategic processing technologiesMicroprocessor Technology:StrategyDESIGNShort term(2024-26)Medium term(2026-28)Long term(2028-)Post-exascale RISC-V/ARM systems based on EU R&DNew architect

3、ures Complement the work of EPI and Pilots with stand-alone competitive processors&acceleratorsBuilding on EU R&D in low power,security,EuroHPC post-exascale system as first customerFirst IPsBuild on EPI efforts on ARM-based processorFrom test chips to TRL 9EuroHPC exascale systems as first customer

4、HPC microprocessor technologyStrategic R&I roadmap to design and deliver energy efficient open hardware technologyFramework Partnership Agreements:EPI:European low-power microprocessor technologiesRISC-V:Large-scale European initiative for High Performance Computing ecosystem based on RISC-VHPC micr

5、oprocessor technologyEuroHPC supercomputerRoadmapEPI:SGA1,SGA2,PILOT2Built with European IP2021202220232024202520262027Accelerator RoadmapACCACCACCPilotOperational HPC system PilotCPU Roadmap CPUCPUCPU2028RISC-V PilotEuropean SupercomputerRISC-V IPsACCComp.with X86,Arm,Power CompetitiveRISC-V FPACom

6、plementary roadmapsInvestment of 400MDeployment-readySilicon proven IP10 TapeoutsChipletsPilotsAIOngoing EuroHPC ActivitiesBeta system:2025VEC HW:2025/2026The EPI ecosystemSession OutlinePart 1Etienne Walter:EPIPhilippe Notton:SiPEARLKarel Masarik:CODASIP/RISC-V InternationalLucana Santos:European S