1、Limin Jiang,Yi Shi,Yintao Liu,Qingyu Deng,Siyi Xu,Yihao Shen,Fangfang Ye,Shan Cao,and Zhiyuan JiangSchool of Communication and Information Engineering,Shanghai University,ChinaA Hierarchical Dataflow-Driven Heterogeneous Architecture for Wireless Baseband ProcessingAdvanced Communication and Computi
2、ng Electronics LabOutlineBackground&MotivationRelated Works System DesignEvaluationConclusion2Background3 5G expansion drives demand for energy-efficient,open-sourcehardware to replace proprietary solutions.Implementing hardware for data-intensive wireless baseband processing(WBP)poses major challen
3、ges.Background4X86 Server/GPGPU:Massive computing capabilityHigh energy consumptionASIC:Best PPALong time to marketDSP:VLIW boosts ILPHigh control overhead limits scalabilityWBP:How?Motivation5 Two characteristics of WBP:Modular:TDD frame structure separates uplink and downlink into data-independent
4、,successivemodules.Cyclical:Signal generation or decoding based on communication protocols is on a subframe(periodic)basis.WBP is decoupled and predictable.Contribution6 A cache-free manycore architecture is proposed to increase energy and area efficiency without compromising performance due to the
5、predictable data processing nature of WBP.We develop a pack-and-ship data dispatch system to enable the tiles to operate in a bundled access and execution style,which can drastically reduce the cost of data movement.A hierarchical dataflow task scheduling scheme is designed and two strategies,namely
6、 multi-threading and lazy-deletion,are proposed to fully utilize the hardware resources.7Related WorksWorkCore HeterogeneityScalabilityDLPTLPHW/SW Co-designSoraTeraPool-SPECTRUMMACRON-MAGALI-DXT501Ours Various works have been presented in academia seeking a way towards manycore parallel computing fo