1、PIRLLS:Pretraining with Imitation and RL Finetuning for Logic SynthesisGuande Dong,Jianwang Zhai,Hongtao Cheng,Xiao Yang,Chuan Shi,Kang Zhaodongguande,zhaijw,Beijing University of Posts and Telecommunications Introduction Preliminaries Motivation Framework Experiments ConclusionContentsGuande Dong/B
2、eijing University of Posts and Telecommunications221 January 2024IntroductionIntroduction Logic synthesis transforms a high-level circuit description at the Register-Transfer Level(RTL)into an optimized gate-level netlist.Logic optimization directly affects technology mapping,determining the final n
3、etlists area and delay.4Introduction The popular open-source tool ABC 1 represents combinational logic using And-Inverter Graphs(AIGs).ABC provides various logic optimization operators,such as:1ABC:An academic industrial-strength verification tool,CAV 2010(a)rewrite(b)balance(c)resub5IntroductionCha
4、llenges The exponentially growing search space makes design space exploration challenging.For a set=1,2,and flow length,there are possibilities.Different circuits have unique characteristics,requiring tailored optimization operators flows to achieve the best results.Challenges remain in representing
5、 AIG states and optimization flows,hindering the application of machine learning methods.6IntroductionTo overcome the above challenges,many design space exploration methods have been proposed.Related WorkDRiLLS constructs scalar features and integrates the A2C agent1.GNNs capture AIG topology and co
6、mbine it with historical decisions2.Random Forests analyze feature importance for pruning3.Context-based multi-armed bandit with Syn-LinUCB4.Monte Carlo Tree Search with SynUCT5.1 K.Zhu,et al.“Exploring Logic Optimizations with Reinforcement Learning and Graph Convolutional Network,”in Proc.,MLCAD,2