利用 GNN 提升晶体管级电路仿真性能.pdf

1、ASP-DAC 2025Jiqing Jiang,Yongqiang Duan,Zhou Jin Super Scientific Software Laboratory,China University of Petroleum-Beijing,ChinaEmail: Boosting the Performance of Transistor-Level Circuit Simulation with GNNOutlineBackground and MotivationProposed MethodGPTA FrameworkGraph RepresentationEnhanceSAGE

2、Layer-by-Layer Pooling and PredictionExperiment ResultsConclusions and Future WorkOutlineBackground and MotivationProposed MethodGPTA FrameworkGraph RepresentationEnhanceSAGELayer-by-Layer Pooling and PredictionExperiment ResultsConclusions and Future WorkTransistor-level circuit simulation(SPICE si

3、mulation)plays a crucial role in verifying circuit performance,and serving as the basis of timing,yield and reliability analysis,etc.needs to be iteratively verified in the design processCircuit designPre-simulationLayoutdesignVerificationRC extractionPost-simulationChip fabricationNonlinear DC anal

4、ysis in SPICE is key for determining the DC operating point.Newton-Raphson(NR)is widely used,but convergence issues arise due to inaccurate initial guesses.Design process of analog circuitsBackground:Transistor-level Simulation20 January 2025China University of Petroleum-Beijing,China4G(x)x(0)0 x(2)

5、x(1)x*x(3)xG(x)x(0)0 x(2)x(1)x*x(3)xConvergence SituationOverflow SituationLoop Situation Inserting pseudo capacitors/inductors can effectively address discontinuity issues,but it introduces oscillation problems and increases computation time.Solution to the original circuit ()=New circuit equations

6、Original circuit equations =Original CircuitSteady-state solutionDC solutionInserting pseudo elements(C,L)Solving through numerical integration iteration Pseudoelements disappearedPseudo Transient CircuitPseudo Transient Analysis(PTA)is currently the most powerful and promising numerical solving alg