1、ASP-DAC 2025FactorFlow:Mapping GEMMs onSpatial Architectures through Adaptive Programming and Greedy OptimizationMarco RonzaniSpeaker PhD Student marco.ronzanipolimi.itCristina SilvanoFull Professor cristina.silvanopolimi.itMotivationGeneral Purpose High Perf.Power-HungrySpecialized High Perf.Per Wa
2、ttMFLOPs GFLOPs TFLOPs per inferenceSource:13,14,15MLPMLPCNNCNNTransformerTransformerSPATIAL ARCHITECTURESSPATIAL ARCHITECTURESSystolicSystolic ArrayArrayGPUGPUCPUCPUProcessing Elements MeshProcessing Elements Mesh1SystolicSystolic ArrayArrayGPUGPUCPUCPUMLPMLPCNNCNNTransformerTransformerGeneral Purp
3、ose High Perf.Power-HungrySpecialized High Perf.Per WattMFLOPs GFLOPs TFLOPs per inferenceMAPPING:MAPPING:determines the workloads determines the workloads execution on the hardwareexecution on the hardwareGOAL:GOAL:to minimize the enegy and to minimize the enegy and latency of running AI kernelslat
4、ency of running AI kernelsSource:13,14,151.1Processing Elements MeshProcessing Elements MeshContributionsMany mapping techniques.No current mapping tool focuses on GEMMs.SoA AnalysisFactorFlow finds 1-161x better mappings in up to205x less time than four SoA tools.Mapping Tools ComparisonThree novel
5、 robust heuristics to map GEMMs.New Mapping Tool:FactorFlowMathematical formulation of the mapping problem.Mapping FormalizationMap-space size analysis.2General Matrix Multiplication(GEMM)Each operand is orthogonal to a loop data reusedata reuseRegular data dependencies parallelism opportunitiespara
6、llelism opportunitiesLoop order is arbitrary,a loop can be split in multiple copies.Multiply and Accumulate(MAC)3Spatial Architectures(SAs)Components:Array of Processing Elements(PEs)Memory hierarchyInterconnectsModeled as a hierarchy of levelshierarchy of levels:Memory levelSpatial fanout levelComp