20250122_E-103_Pancholi.PDF

1、 2025 Amkor Technology,Inc.Vineet Pancholi l Sr Director,Test TechnologyJanuary 2025Best Practices for Testing 2.5D Chiplet Package Designs2 2025 Amkor Technology,Inc.AgendaIntegration End Markets1Amkor Package Integration Technologies2The UCIe standard3Best Practices for Test4Production Test Eco-Sy

2、stems53 2025 Amkor Technology,Inc.Multi-die Packages Are UbiquitousAutomotive,Health,IndustrialADAS,SiP/IVI MEMS,sensors Performance,safetyCommunications5G,RF&mixed signal Handheld devices Mobile/Smartphones Tablets,IoT,satelliteArtificial Intelligence,Networking,ComputingNetworkingData center,infra

3、structure PC/Laptop,storageConnected home Set-top box,televisions Visual imaging,wearablesConsumerAmkor Integration Market Applications4 2025 Amkor Technology,Inc.Chiplets&PackagesMore gates than one reticleSilicon reuseMore gates than 1 dieAI,ProcessorsNetwork Processor,SW,RouteCPU,ServerPerformanc

4、e/costSilicon reusePC CPU/GPU&AutoGPUMEMMEMMEMMEMMEMMEMASICMEMMEMMEMMEMASICI/OI/OI/OI/OI/O2I/O2ASICMEMMEMI/OI/OI/OI/OHBM2eHBM2eCPUI/OI/OI/OI/OI/O2I/O2PPI/OGPUModuleCPUFCBGAModular Chiplet PackagingCPUMEMMEMI/OI/OI/OI/OHBM2eHBM2eMemory co-locationCPU2.5D TSVHDFOBridgeDie Disaggregation,to Allow Highe

5、r Levels of IntegrationSubstrate5 2025 Amkor Technology,Inc.Production Test OpportunityBest Practice6 2025 Amkor Technology,Inc.Production Probe Opportunitybumps:Probe pad size&pitchesUse sacrificial pads where test methodology demandsStructural test methodology ensure adequate test coverageNot dire

6、ctly accessible at package levelDie-to-die interconnectTighter pitch bumpsSacrificial pads DieWafer LevelATEPower Supply Instr.Pin Electronics Instr.Analog Source/Meas.Instr.RF Source/Meas.Instr.PowerGroundLogic I/OAnalog/MS I/ORF I/OTest AccessPower/GNDHigh speed/SerDes/difflAnalog/RFDigital I/O,ho