30-Compiler opt challenges Yakushkin RVSC2023 Final.pdf

1、Copyright 2023 Syntacore.All trademarks,product,and brand names belong to their respective owners.Compiler Optimizations Challenges for High-Performance RISC-V CoresAugust 25,2023Presenter:Sergey YakushkinContributors:Konstantin Vladimirov and Syntacore Compiler TCopyright 2023 Syntacore.All tradema

2、rks,product,and brand names belong to their respective owners.2Example High-Performance Core-SCR9Linux-capable application CPU with entry-level server class features:8-16 cores per cluster(SMP and heterogeneous)Multi-issue OOO uArchCoherent NoC-based L3CHI external i/fSV39,SV48,SV57RVVHypervisorAIAA

3、ccelerators supportEarly access program*(*)some features may be not available in the initial release Copyright 2023 Syntacore.All trademarks,product,and brand names belong to their respective owners.3Fully-integrated system and DevKitbased on VCU118 https:/ http:/ to 24GB RAM,up to 100-150 MHz,1GB E

4、thernet,PCI/SSD storageBoots upstream Debian Linux kernel 5.15/6.1 LTSIntegrated toolchain with IDE(supports Bare Metal and Linux targets)Extra SW including OpenJDK stable buildsSCR7/9 FPGA-based DevKitCopyright 2023 Syntacore.All trademarks,product,and brand names belong to their respective owners.

5、4HostsSyntacore Development ToolkitSC-DT 2023.08 release:LLVM 16.x with optimizationsGNU GDB 13.2Open On-Chip Debugger 0.12.xQEMU 8.0.3GCC 12.2.1GNU Binutils 2.38Newlib4.10Visual Studio Code and EclipseSimulators:QEMUSpikeSAIL3rdparty vendorsJTAG-based debug solutions:SeggerJ-linkOlimexARM-USB-OCD f

6、amilyDigilentJTAG-HS2more vendors soonAlso available:COMPCERTProfiling toolsOpenJDKBare Metal+Linuxhttps:/ 2023 Syntacore.All trademarks,product,and brand names belong to their respective owners.5LLVM Compiler and OptimizationsUpstream LLVM for RISC-V in 2022Gaps vs AArch64/GCC,10%diffs on some work