Industry SMBus to I3C Transition Readiness Proven.pdf

1、Off-the-shelf devices support SMBusto I3C transitionIndustry SMBus to I3C Transition Readiness ProvenHardware ManagementIndustry SMBusto I3C Transition Readiness ProvenZbigniew Lukwinski,Cloud Software Architect,Intel CorporationCo-authors:Myron Loewen,Platform Architect,SolidigmJanusz Jurski,Platfo

2、rm Architect,Intel CorporationAgendaIntro:Industry LandscapeSystem Architecture and Experiment FlowExperimentation ResultsCall to ActionIndustry LandscapeSMBus/I2C sideband interface used by all PCIe/CXL form factors challenged with new use casesMCTP(conflicts with MUX-based architectures),asynchron

3、ous traffic patterns,no common addressing architecture,security expectations,very low bandwidth,etc.MIPI I3C Basic natural upgrade to address SMBus/I2C limitationsPrior call to action at OCP Global Summit 2021(Composable Security Architectures)Upgrade details defined in EDSFF specification(SNIA SFF-

4、TA-1009 revision 3.1,published January 6th,2023)Expecting PCI-SIG and other standards to follow EDSFF solution will work for all form factorsIntel and Solidigmpartnered to build and validate EDSFF-compliant SMBus-compatible I3C solution using only off-the-shelf componentsSystem Architecture for PCIe

5、/CXLBMC with I3C Controller(Aspeed AST2600)OpenBMC FW with MCTP over I3C bindingsupportHUB(Renesas RG3M87B12)Enables SMBus to I3C transition as per EDSFF SFF-TA-1009 specificationFixes MCTP over SMBus multi-initiator related challenges with multiplexersCommon HUB specification(drop-in compatible dev

6、ices from multiple sources)I3C-capable device(Microchip PIC18F16Q20)Supports MCTP over I3C binding with sample commandsLegacy SMBus device(emulated with Total Phase Aardvark)Unaware of I3CUnable to work efficiently with multiplexed SMBus(separate experimentation)Intel,Solidigm,Aspeed,Renesas,Microch