通过 ASE VIPack™ 和 Arm Total Design Collaboration 加速芯片集成.pdf

1、Dr.Lihong Cao,ASE GroupSridhar Valluru,ArmAccelerating Chiplet Integration Through ASE VIPack and Arm Total Design CollaborationAccelerating Chiplet Integration Through ASE VIPack&Arm Total Design CollaborationDr.Lihong Cao,Sr.Director,ASE(US)Inc.Sridhar Valluru,Director Product Management,ArmSERVER

2、:OPEN CHIPLETECONOMYFull stack to enable chiplets for AI SystemsIOMEMORYSYSTEMSECURITYOPTIMIZED ARM CPU CHIPLETSINTEGRATED AND VALIDATED SUBSYSTEMS ToFromFirmwareComputeStandardsArchitectureSoftware EnablementKernel librariesSubsystemsCSA,AMBA,UCIeInstruction SetBIOS,BMCAI applicationSystem Demands

3、Feedback LoopAI is the full stackPlatformFoundationStandardsCompute ChipletSoftware Stack and ToolsAIAccelerator ChipletAccelerator DriversChiplet StandardsArm contributing CSA to OCP to initiate ISA agnostic Foundation ChipletArchitectureBuilding a chiplet supply chain to accelerate TTMConceptPhase

4、 4Power DistributionThermal ManagementSolutionPhase 3Co-simPrototypingPhase 1Functional PartitioningSystem PerformanceCPUMemMemAccelCPUMemMemAccel0101011110111000Phase 2Transport ChoiceStandards based IP EcosystemInterfaceCPUAccelMemPhase 5ManufacturingTest&PackagingPhase 6Telemetry&DebugFirmware,So

5、ftwarePartnerships with companies represented in OCP MarketplaceMore than MoorePushing LimitsLowering CostsNew Efficiency Market demand for AI performance is faster than Moores Law doubling transistors every 18 monthsAn inflection point approaching requires unprecedented innovation&collaboration New

6、 node introduction rate is slowing,yet cost continues to rise requiring novel design,process,and manufacturing techniquesChips need more functional blocks:chiplets integration optimizing new architecture,packaging technologiesScaling for the AI EraGrowing Demands and Challenges i